EVE2 TFT Modules VHDL Coding

bivin

• October 03, 2018 08:07

Hi
I'm using NHD-3.5-320240FT-CSXN-CTP. As per FT81x Series Programmers Guide, in " Initialization Sequence during the boot up" section , display list writing is given by below functions.

wr32(RAM_DL+0,CLEAR_COLOR_RGB(0,0,0));
wr32(RAM_DL+4,CLEAR(1,1,1));
wr32(RAM_DL+8,DISPLAY());
wr8(REG_DLSWAP,DLSWAP_FRAME);//display list swap
wr8(REG_GPIO_DIR,0x80|rd8(REG_GPIO_DIR));
wr8(REG_GPIO,0x080|rd8(REG_GPIO));//enable display bit
wr8(REG_PCLK,5);//after this display is visible on the LCD
MCU_SPI_CLK_Freq(<30Mhz);//use the MCU SPI clock upto 30MHz

Kindly let me know what are the equivalent register read/write (w.r.t DS_FT81x.pdf) to implement the above in vhdl.

Thanks

0

• 

  Ted M.

  NHD Staff

  • October 03, 2018 09:07

  Hi Bivin,
  
  Thanks for your inquiry.
  This information may be best answered by the FTDI technical support resources provided in the link below:
  https://www.ftdichip.com/FTContact.htm
  
  Best Regards,
  
  Ted

  0
• 

  bivin

  • October 03, 2018 10:07

  Dear Ted
  
  Please provide Indian Technical support contact details.
  
  Thanks

  0

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