NHD-4.3-800480CF-ASXP-CTP timing diagram shows 480 pixel in a line

Thomas Leyrer

• June 18, 2025 15:08

Hi,

  I am confused with timing diagram in datasheet copied below. It shows 480 pixels in an HSYNC display period which I expect whould be 800 pixels. It also shows 272 lines vs 480 lines. I assume this diagram is not correct for the 800 x 480 display. Just want to make sure the display is 800x480 and not 480x800.

- Thomas 

0

• 

  Engineering Support

  Community moderator

  • June 19, 2025 15:40
  • Edited

  Hi Thomas, 

  You are correct there should be 800 pixels in the HSYNC display period and 480 lines total. We apologize for any confusion this may have caused and appreciate you pointing it out. We will work on updating the specs timing diagram to reflect the correct values. In the meantime, please refer to the IC datasheet for an accurate timing diagram. 

   

  0

Please sign in to leave a comment.