Connect NHD-2.4-240320AF-CTXP SPI 3-Wire
HI,
I want connect NHD-2.4-240320AF-CTXP in a 3-wire SPI mode.
I read about 3-wire SPI and I understand that the connections needed are an SDA/SDO, CLK and CS signal, that is 3 connections. In this TFT, I need to add RESET and TE signal but for now, they are not a problem.
Going back to the 3-wire, there are several ways on the internet to connect the SDO/SDA between the MCU and the TFT. Leaving the SDO free, putting a resistor on the SDO, connecting the SDA and SDO to the same cable, ... These are some of the examples. But when I check the product specifications, the connection diagram between the MCU and the TFT, it connects the SDA -> SDO and SDO -> SDA as in the drawing.
According to the schematic 4 SPI signals are being used, is that correct? Did i misunderstand SPI 3-wire?
Greetings and thanks,
Xavier
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Another question, what is the maximum SPI frequency that this TFT works?
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Hi Xavier,
3-wire SPI does in fact require the 3 connections you listed:
- Serial Data Output (SDA to SDO)
- Chip Select (CSX)
- Serial Clock Signal (DCX)
The additional signals (Reset, Tearing Effect Output, and the other Power Supply Signals) while required, are not part of the communication over SPI.
Although, as you have also mentioned, the signal for Serial Data Output is also available as a connection on this display and shown on the wiring diagram. This is to allow for the read function of the display as described in Section 8.4.3 of the ST7789VI controller specification and is to be left open when not in use.
Lastly, the maximum clock frequency is determined by the clock range of the controller that you are using to interface with the display. Please note that the timing characteristics from the specification define the minimum operation required for the display.
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Hi,
I started to configure the LCD in AM335X processor with SPI in Linux Kernel 5.10.
I created a new device SPI in the device tree and when I started the SO a reviewed the start log I had many warnings about led, wr, rd and aux gpios. I don't understand why I have warnings about WR and RD when this GPIOS is connected to the GND in SPI mode. Would it be possible to disable these PINs in Device Tree to not appear this warnings in logs?
But the problem is in the DC-GPIO because generates an error and not start SPI. In specifications, the DC port in LCD is used in parallel interface to differentiate the command and data and in SPI mode is used to CLOCK. What should this port be? I need to use the same SCLK PIN or create a new GPIO?
Thanks,
Xavier
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Hi Xavier,
Thank you for your questions. Let me clarify the 3-wire SPI setup and help with the device tree configuration issues.
1. 3-Wire SPI Connections:
In 3-wire SPI mode, the connections needed are:
- SDA (Serial Data Input/Output): Handles both data transmission and reception.
- SCLK (Serial Clock): Controls the timing of the communication.
- CS (Chip Select): Selects the display for communication.
The SDO pin (Serial Data Output) can be left unconnected in this mode, as it's not required unless you need read functionality. This is consistent with the wiring diagram for the ST7789VI controller. The fourth signal you mentioned is likely the DCX (Data/Command Selection) signal, which is sometimes used in 4-wire SPI, but in 3-wire SPI mode, SCLK typically handles that role.
2. SPI Clock Frequency:
The maximum SPI frequency is determined by the ST7789VI controller. According to the datasheet, typical SPI clock frequencies up to 10-20MHz are supported, but this depends on your microcontroller's capabilities and the system setup. You can refer to the timing characteristics in section 7.4.2 of the ST7789VI datasheet for more details.
3. GPIO Warnings in Device Tree (Linux Kernel 5.10):
The warnings you’re seeing for WR and RD GPIOs occur because these pins are only used in the parallel interface mode. Since you are using SPI mode, these pins should be grounded or left unconnected, and you can disable these GPIOs in your device tree to prevent the warnings.
To do this:
- Locate the entries for WR and RD in your device tree and set them as "unused" or simply remove them if not needed.
4. DC-GPIO Pin Configuration:
In SPI mode, the DCX pin (Data/Command) can either be tied to SCLK or configured as a separate GPIO. The DCX pin differentiates between sending data and commands in parallel interface mode, but it may still be required in some SPI configurations. If you are seeing errors with DC-GPIO, ensure the pin is correctly mapped in your device tree, or use a dedicated GPIO pin if necessary.
Let me know if you need further assistance.
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Thank you very much for the answer.
1. 3-Wire SPI Connections:
I will leave the SDO unconnected.
2. SPI Clock Frequency:
I imagine that by indicating the maximum frequency in the Device-Tree, the driver will select the working frequency?
3. GPIO Warnings in Device Tree (Linux Kernel 5.10):
I understand this GPIOs is unused because these PINs are used in parallel mode. I just wanted to remove the warnings from the logs.
4. DC-GPIO Pin Configuration:
But in the LCD datasheet, the SPI Clock and Data / Command is the same port.
How should I connect it?
Thanks,
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For your questions:
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3-Wire SPI Connections:
- Leaving SDO unconnected in 3-wire SPI mode is the right approach unless you need read functionality.
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SPI Clock Frequency:
- Yes, the driver typically selects the working frequency based on the maximum frequency defined in the device tree. Make sure to specify a compatible frequency based on the ST7789VI controller's timing characteristics (as mentioned, around 10-20MHz should be safe)
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GPIO Warnings in Device Tree (Linux Kernel 5.10):
- Since WR and RD are only used in parallel mode, you can safely remove or disable them in the device tree, as you mentioned. This will prevent unnecessary warnings in your logs.
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DC-GPIO Pin Configuration:
- You’re absolutely right: in SPI mode, the DCX pin (which handles data/command distinction in parallel mode) doubles as the SCLK (Serial Clock) in serial mode, as shown in the datasheet snippet you shared. This means the DCX and SCLK are indeed the same pin in this case.
To clarify:
- Pin 11 (DCX) handles both the serial clock signal (SCLK) in 3-wire SPI mode and the data/command distinction in parallel mode.
In summary, make sure the device tree reflects the correct clock assignment to DCX for SPI mode, and you should be able to avoid the error you're seeing.
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Hello,
I am analyzing the display signal generated by the driver with an oscilloscope and I see clock, SDA and CS signals but the RESET and TE signal generated by the driver are low voltage. Since the TE signal is used to regulate the brightness, I have given a high voltage as a signal. In the same way, I have the reset signal connected to a DC output of the system that is only activated when the system starts.
Despite having signals on the screen and having the driver started in the operating system, nothing is displayed.
What can I verify or try to see someone on the screen?
Thank you,
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