TFT 7-inch Sample Code Questions

Tim_Cole
Greetings and Happy New Year!
While working through the sample code files TFT_7_0.c and Arduinio_nhd-7_0-800480EF.ino, I've found puzzling register settings for initialization settings.

Looking at TFT_7_0.c, I notice in function TFT_7_Init
  TFT_7_Write_Command(0xb0);      //SET LCD MODE  SET TFT 18Bits MODE
  GPIO_SetBits(GPIOC, RS);
  TFT_7_Write_Data(0x08);         //SET TFT MODE & hsync+Vsync+DEN MODE

This first parameter suggests that FRC (which I assume is "Frame Rate Control") is turned on, which would make sense for 18-bit pixels (as described in in the old data sheet for an 8-bit MCU interface). But, wouldn't it be best to specify 24-bit pixels?

Next, I notice the line:

   TFT_7_Command_Write(0x3a, 0x60) // SET R G B format = 6 6 6
However, the data sheet now describes command 0x3A as reserved.

A little farther down:
  TFT_7_Write_Command(0xe2);         //SET PLL freq=113.33MHz
  GPIO_SetBits(GPIOC, RS);
  TFT_7_Write_Data(0x22);
  TFT_7_Write_Data(0x03);
  TFT_7_Write_Data(0x04);
 
Using the formula in the section describing command 0xE2 (set_pll_mn) yields fVCO = 350 MHz and fPLL = 87.5 MHz

And:
  TFT_7_Write_Command(0xe6);         //SET PCLK freq=33.26MHz
  GPIO_SetBits(GPIOC, RS);
  TFT_7_Write_Data(0x02);
  TFT_7_Write_Data(0xff);
  TFT_7_Write_Data(0xff);

Using the formula in the section describing command 0xE6 (set_lshift_freq) yields fPCLK = 0.1875 fPLL = 16.41 MHz
When I downloaded a new copy of the SSD1963 data sheet from your Application Notes section, I noticed it is now Rev 1.1, dated Jan 2010. The data sheet I'd previously downloaded was Rev 0.20, dated Dec 2008. There are a few significant differences. In particular, commands 0x0C and 0x3A have been removed, the formulas for calculating PLL frequencies have changed (as described in the section on command 0xE2), and the pixel data format table (Table 7.1) shows LSBs for R,G, and B bytes are no longer marked as don't cares. I suspect this might have something to do with the oddities I've mentioned.

Folks, I'm not trying to be a pedantic PITA here. What I'm concerned about is that I mightn't have the right data sheet for the SSD1963  -- perhaps this new data sheet doesn't describe the devices you're using. And, of course, I might not have understood the data sheet properly.

Could you folks take a quick  look at the data sheet and the sample code to see if they reflect the devices you're shipping in the NHD-7.0-800480EF series controller boards?

Regards,
Tim Cole
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Comments

2 comments

Date Votes
  • Michael_L

    Happy Holidays to you too!  After reading your post, I understand you have several questions regarding the example code for the TFT controller board we offer.  I would first like to say that this code is meant to serve as merely an example of working code to get you started.  It is in not necessarily the "best" or most optimized code, but it has been tested to work.  The code can be modified with your desired parameters that are best for your application.  As for some of your last comments, you are correct.  The commands 0x0C and 0x3A have been removed (which is why you see it in the example code unfortunately).  Leaving the lines in there still allows for the SSD1963 to work, but yes they "should" be removed for the more current chip.

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  • Tim_Cole

    Thanks for the quick reply, Micheal. It's a relief to know that I've downloaded the correct documentation --- which is all that really matters.

    Once again,  you folks really come through with customer service. It's one of the best reasons for doing business with you.

    Regards, Tim

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