FPGA driver for NHD-1.8-128160EF TFTs
This is the FPGA driver for the NHD-1.8-128160EF TFTs with the ILI9163 driver IC using the 8 bit parallel interface. The basic design is the same as for the NHD-2.4-240320CF project last week
The driver runs on an Arty Z7-20 FPGA board, reads the HDMI IN video signals and outputs a 160x128 pixel area to the connected TFT via IO. So you can connect a HDMI source to the board and the NHD TFT will display a 160x128 chunk of the picture (or a crudely downscaled 320x256 chunk) on the TFT with a frame rate of 200 fps.
Here's the link to the Github repo:
https://github.com/joaBaur/ArtyZ7-20-NHD-1.8-TFT
One strange issue I came across with my test setup (using a NHD-1.8-128160EF-CTXI#-T):
The MADCTL function of the driver (Memory Access Control, determines the orientation/mirroring of the image and the RGB order of the pixels) doesn't work for me. When the init sequence sends the 0x36 MADCTL-command, no matter what data value I send after that, the orientation of the image is always the same and the pixel order is always BGR, like the default 0x00 value that MADCTL is set to after a reset is not updated.
No idea why, maybe an electronic fault of my driver IC's MADCTL register? Other commands work fine, when I send a 0x21 (Display Inversion On) command after the MADCTL cmd+data, the display is inverted as expected, for example.
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Alright, the MADCTL issue is resolved - I connected the other 1.8" TFT I have here (a NHD-1.8-128160EF-CSXN#) and MADCTL is working as it should, so I removed the workarounds from my code.
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