NHD-7.0-800480EF-ATXV
I'm planning to use an NHD-7.0-800480EF-ATXV-T driven directly from an FPGA.
What mode is the source driver set to? DE or HSD/VSD mode?
What HS front porch value should I use? Also VS front porch?
Will it be readable in direct sunlight?
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By default the source driver is set to DE mode. There is no pin on the 40 pin connector that allows you to change this mode.
Please refer to page 6 of the specification sheet for the horizontal and vertical front porch values. Click Here For The Specification Sheet:
This is a transmissive display so the display may partially wash out in direct sunlight. However depending on the angle at which you mount the display and the brightness of the backlight you might still be able to view it.0 -
Thanks for your answers.
The data sheet gives a range of HS Front Porch 1-255 DCLK and VS Front Porch 1-255 Th. Does this mean I can use anything in this range and it doesn't matter, or do these values adjust the position of the screen and I need to determine them on my own?0 -
You will have to determine the values that you need for your setup. Even if you use a value from that range, the display may show ghosting and/or flickering if not optimized properly.
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Thanks again for your help. I guess I'm a bit ignorant about how the porches relate to ghosting and flickering in an LCD. Can you point me to somewhere I can read up on it?
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We don't have any documents that pertain to the correlation between porch settings and ghosting/flickering. This is something you will notice as the porch settings are adjusted for the display. Try using the given typical values in the specification sheet and from that, make adjustments to suit the display.
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Concerning porches:
I am new to displays; but I have come to some conclusions and I hope you can confirm or correct me. Since I am spinning my own controller, it seems that the porches don't matter (they don't change the image) except that they add dead time and slow down throughput. Porches are a throwback to analog CRT days. The first DEN enabled data word after HSD is always the first pixel. The last enabled data word before the next HSD is always the last pixel for that row. It is just that some controllers use the extra porch time to add video effects.
http://en.wikipedia.org/wiki/Vertical_blanking_interval0 -
I am using NHD-7.0-800480EF-ATXV#-T part with iMX6Q processor. I have supplied 9.7V across its anode and cathode pins. I have also enable display on/off signal and data enable signal. There is no backlight coming up at all.
Is this problem due to enable signals or is there any problem with the hardware setup??0 -
What is the current limit for your backlight supply?
For the backlight you would not need to apply the Display Enable signal. Also could you give me a date code for the display you are currently using?0 -
Morning,
The backlight requires a constant-current mode boost converter E.g. FAN5333BSX
http://www.digikey.com/product-detail/en/fairchild-semiconductor/FAN5333BSX/FAN5333BSXCT-ND/3042778
What source are you using to power the backlight? If you have a DMM can you please post the current draw and voltage?
Finally the Data Enable & Display on/off signal will have no affect on the backlight.0 -
Resolved via email, post closed.
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